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Publications
Article
An Extended Efficient Algorithm of Pattern Matching for Partially Commutative Monoids
Article
LEARNING METHODOLOGY FOR VALIDATION OF MEMORY BIST SOLUTIONS VIA A SHARED INTERFACE
Article
Results of Validation Analysis for Multi-Memory Bus BIST Engines
Article
Repair of Resistive Open Defects on Word-Lines and Bit-Lines of SRAMs
Article
An Approach for Increasing Memory Repair Efficiency
Article
Analytics for AI Related Applications of Multidimensional Multitape Finite Automata
Article
Functional Safety Compliant Test & Repair Framework for System-on-Chip Lifecycle Management
Patent
DETECTION OF ADDRESS ERRORS IN MEMORY DEVICES USING MULTI-SEGMENT ERROR DETECTION CODES
2021
Article
Polynomial algorithm for equivalence problem of deterministic multitape finite automata
Article
Memory Physical Aware Multi-Level Fault Diagnosis Flow
Article
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism
Conference
Armenia: Communicating to World Community in Electronic Test and Design
2019
1-3
Patent
FINFET-BASED MEMORY TESTING USING MULTIPLE READ OPERATIONS
2019
Article
Experimental study on Hamming and Hsiao Codes in the Context of Embedded Applications
Article
Automated Flow for Test Pattern Creation for IPs in SoC
Article
An Efficient Testing Methodology for Embedded Flash Memories
Article
Security Issues in Test and Repair Infrastructure for Systems-on-Chip
Patent
Testing Electronic Memories Based on Fault and Test Algorithm Periodicity
2017
Conference
Securing Test Infrastructure of System-on-Chips
2016
29-32
Conference
An efficient approach for memory repair by reducing the number of spares.
2015
21-25
